\section{ec\+\_\+fsm\+\_\+master Struct Reference}
\label{structec__fsm__master}\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}


Finite state machine of an Ether\+C\+AT master.  


\subsection*{Data Fields}
\begin{DoxyCompactItemize}
\item 
\mbox{\label{structec__fsm__master_af5597239477f215c744aad387d7baa6b}} 
\textbf{ ec\+\_\+master\+\_\+t} $\ast$ \textbf{ master}
\begin{DoxyCompactList}\small\item\em master the F\+SM runs on \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_a518334a40bb6eeea55081a997bbaebc2}} 
\textbf{ ec\+\_\+datagram\+\_\+t} $\ast$ \textbf{ datagram}
\begin{DoxyCompactList}\small\item\em datagram used in the state machine \end{DoxyCompactList}\item 
unsigned int \textbf{ retries}
\begin{DoxyCompactList}\small\item\em retries on datagram timeout. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_a2f5af7218647e9b14813f1033f8fc91a}} 
void($\ast$ \textbf{ state} )(\textbf{ ec\+\_\+fsm\+\_\+master\+\_\+t} $\ast$)
\begin{DoxyCompactList}\small\item\em master state function \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_ab57f14b0c615bae6428ff89ef2cb7ef0}} 
\textbf{ ec\+\_\+device\+\_\+index\+\_\+t} \textbf{ dev\+\_\+idx}
\begin{DoxyCompactList}\small\item\em Current device index (for scanning etc.). \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_aa06626b21389030366d7aed5f525c6c0}} 
int \textbf{ idle}
\begin{DoxyCompactList}\small\item\em state machine is in idle phase \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_acf6f1bd6e82f2947e181ed23f9d5f6f9}} 
unsigned long \textbf{ scan\+\_\+jiffies}
\begin{DoxyCompactList}\small\item\em beginning of slave scanning \end{DoxyCompactList}\item 
uint8\+\_\+t \textbf{ link\+\_\+state} [E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]
\begin{DoxyCompactList}\small\item\em Last link state for every device. \end{DoxyCompactList}\item 
unsigned int \textbf{ slaves\+\_\+responding} [E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]
\begin{DoxyCompactList}\small\item\em Number of responding slaves for every device. \end{DoxyCompactList}\item 
unsigned int \textbf{ rescan\+\_\+required}
\begin{DoxyCompactList}\small\item\em A bus rescan is required. \end{DoxyCompactList}\item 
\textbf{ ec\+\_\+slave\+\_\+state\+\_\+t} \textbf{ slave\+\_\+states} [E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]
\begin{DoxyCompactList}\small\item\em AL states of responding slaves for every device. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_aaa3d10bbf5af6278cec37fcd7b771372}} 
\textbf{ ec\+\_\+slave\+\_\+t} $\ast$ \textbf{ slave}
\begin{DoxyCompactList}\small\item\em current slave \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_a0e8413b9433f4223911da952e2e26a7a}} 
\textbf{ ec\+\_\+sii\+\_\+write\+\_\+request\+\_\+t} $\ast$ \textbf{ sii\+\_\+request}
\begin{DoxyCompactList}\small\item\em S\+II write request. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_ad9050cec0823e4e0f4ac34effddd8d21}} 
off\+\_\+t \textbf{ sii\+\_\+index}
\begin{DoxyCompactList}\small\item\em index to S\+II write request data \end{DoxyCompactList}\item 
\textbf{ ec\+\_\+sdo\+\_\+request\+\_\+t} $\ast$ \textbf{ sdo\+\_\+request}
\begin{DoxyCompactList}\small\item\em S\+DO request to process. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_a2bc8d2dd67be1dbddac6c20190e3632c}} 
\textbf{ ec\+\_\+fsm\+\_\+coe\+\_\+t} \textbf{ fsm\+\_\+coe}
\begin{DoxyCompactList}\small\item\em CoE state machine. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_acab91592f35788b01419702634765b86}} 
\textbf{ ec\+\_\+fsm\+\_\+soe\+\_\+t} \textbf{ fsm\+\_\+soe}
\begin{DoxyCompactList}\small\item\em SoE state machine. \end{DoxyCompactList}\item 
\textbf{ ec\+\_\+fsm\+\_\+pdo\+\_\+t} \textbf{ fsm\+\_\+pdo}
\begin{DoxyCompactList}\small\item\em P\+DO configuration state machine. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_a64f30f383522a78b12151f803f39c552}} 
\textbf{ ec\+\_\+fsm\+\_\+change\+\_\+t} \textbf{ fsm\+\_\+change}
\begin{DoxyCompactList}\small\item\em State change state machine. \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_acd8d73f9c016a18c19eb120f8d691c62}} 
\textbf{ ec\+\_\+fsm\+\_\+slave\+\_\+config\+\_\+t} \textbf{ fsm\+\_\+slave\+\_\+config}
\begin{DoxyCompactList}\small\item\em slave state machine \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_aeac9947df44bf439f0e1f2b1c1b7b33f}} 
\textbf{ ec\+\_\+fsm\+\_\+slave\+\_\+scan\+\_\+t} \textbf{ fsm\+\_\+slave\+\_\+scan}
\begin{DoxyCompactList}\small\item\em slave state machine \end{DoxyCompactList}\item 
\mbox{\label{structec__fsm__master_aeac629d016ca18930554d88646b1516f}} 
\textbf{ ec\+\_\+fsm\+\_\+sii\+\_\+t} \textbf{ fsm\+\_\+sii}
\begin{DoxyCompactList}\small\item\em S\+II state machine. \end{DoxyCompactList}\end{DoxyCompactItemize}


\subsection{Detailed Description}
Finite state machine of an Ether\+C\+AT master. 

Definition at line 68 of file fsm\+\_\+master.\+h.



\subsection{Field Documentation}
\mbox{\label{structec__fsm__master_a6dea4cfd065a817b358441748378bd14}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!retries@{retries}}
\index{retries@{retries}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{retries}
{\footnotesize\ttfamily unsigned int ec\+\_\+fsm\+\_\+master\+::retries}



retries on datagram timeout. 



Definition at line 71 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a6b0de3d8e619c6937679b6e746dd3c1f}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!link\+\_\+state@{link\+\_\+state}}
\index{link\+\_\+state@{link\+\_\+state}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{link\+\_\+state}
{\footnotesize\ttfamily uint8\+\_\+t ec\+\_\+fsm\+\_\+master\+::link\+\_\+state[E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]}



Last link state for every device. 



Definition at line 78 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a0e6fafb6571a8c72ef75d37b335f168c}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!slaves\+\_\+responding@{slaves\+\_\+responding}}
\index{slaves\+\_\+responding@{slaves\+\_\+responding}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{slaves\+\_\+responding}
{\footnotesize\ttfamily unsigned int ec\+\_\+fsm\+\_\+master\+::slaves\+\_\+responding[E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]}



Number of responding slaves for every device. 



Definition at line 80 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a173d3201cbfb35d29ff02788d7396839}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!rescan\+\_\+required@{rescan\+\_\+required}}
\index{rescan\+\_\+required@{rescan\+\_\+required}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{rescan\+\_\+required}
{\footnotesize\ttfamily unsigned int ec\+\_\+fsm\+\_\+master\+::rescan\+\_\+required}



A bus rescan is required. 



Definition at line 83 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a76906b5cbaec1d07e5881738a6ce008e}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!slave\+\_\+states@{slave\+\_\+states}}
\index{slave\+\_\+states@{slave\+\_\+states}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{slave\+\_\+states}
{\footnotesize\ttfamily \textbf{ ec\+\_\+slave\+\_\+state\+\_\+t} ec\+\_\+fsm\+\_\+master\+::slave\+\_\+states[E\+C\+\_\+\+M\+A\+X\+\_\+\+N\+U\+M\+\_\+\+D\+E\+V\+I\+C\+ES]}



AL states of responding slaves for every device. 



Definition at line 84 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a4d4e15f7b94cd12a63a7450db070840b}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!sdo\+\_\+request@{sdo\+\_\+request}}
\index{sdo\+\_\+request@{sdo\+\_\+request}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{sdo\+\_\+request}
{\footnotesize\ttfamily \textbf{ ec\+\_\+sdo\+\_\+request\+\_\+t}$\ast$ ec\+\_\+fsm\+\_\+master\+::sdo\+\_\+request}



S\+DO request to process. 



Definition at line 90 of file fsm\+\_\+master.\+h.

\mbox{\label{structec__fsm__master_a93359faa0215a9448d5663a09f319372}} 
\index{ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}!fsm\+\_\+pdo@{fsm\+\_\+pdo}}
\index{fsm\+\_\+pdo@{fsm\+\_\+pdo}!ec\+\_\+fsm\+\_\+master@{ec\+\_\+fsm\+\_\+master}}
\subsubsection{fsm\+\_\+pdo}
{\footnotesize\ttfamily \textbf{ ec\+\_\+fsm\+\_\+pdo\+\_\+t} ec\+\_\+fsm\+\_\+master\+::fsm\+\_\+pdo}



P\+DO configuration state machine. 



Definition at line 94 of file fsm\+\_\+master.\+h.

